An On-Chip ESD Protection Circuit with Low Trigger Voltage in BiCMOS Technology
نویسنده
چکیده
A novel low-trigger dual-direction on-chip electrostatic discharge (ESD) protection circuit is designed to protect integrated circuits (ICs) against ESD surges in two opposite directions. The compact ESD protection circuit features low triggering voltage ( 7.5 V), short response time (0.18–0.4 ns), symmetric deep-snapback – characteristics, and low on-resistance ( ). It passed the 14-kV human body model (HBM) ESD test and is very area efficient ( 80 V/ m width). The new ESD protection design is particularly suitable for low-voltage or multiple-power-supply IC chips.
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